Of particular interest for Fast Fourier Transform applications was the appearance of embedded memory in ~1995 and embedded arithmetic blocks in ~2002. ![]() Initially used as “glue” logic to provide a fast, cheap interface for off-the-shelf integrated circuits, they can now support applications at a system level due to on-chip building-block embedded elements, like PLLs, transceivers, memory, arithmetic, and soft/hard processor cores. The model of a field programmable gate array (FPGA) has been evolving rapidly since they first appeared in 1985. The following section summarizes why Centar’s architecture is so effective in taking advantage of the new DSP block hardware. Here it is shown that LUT/register usage can be drastically reduced with this new class of FPGAs. After a short contextual discussion section, a comparison of various FFT designs follows based on compilations to a couple of FPGAs. ![]() Here we provide rational for using Centar’s floating-point IP core for the new Altera Arria 10 and Stratix 10 FPGA platforms. Greg Nash, Centar LLC, Los Angeles, California
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